Download PDF by Michiel Steyaert, Arthur H.M. van Roermund, Herman Casier: Analog Circuit Design: High-speed Clock and Data Recovery,

By Michiel Steyaert, Arthur H.M. van Roermund, Herman Casier

ISBN-10: 1402089430

ISBN-13: 9781402089435

Analog Circuit layout comprises the contribution of 18 tutorials of the seventeenth workshop on Advances in Analog Circuit layout. each one half discusses a particular to-date subject on new and necessary layout principles within the zone of analog circuit layout. each one half is gifted through six specialists in that box and cutting-edge info is shared and overviewed. This booklet is quantity 17 during this winning sequence of Analog Circuit layout.

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Additional info for Analog Circuit Design: High-speed Clock and Data Recovery, High-performance Amplifiers, Power Management

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37, pp. 835-844, July 2002. M. Perrott, T. Tewksbury, and C. 5-Mb/s GFSK modulation,” IEEE Journal of Solid-State Circuits, vol. 32, pp. 2048-2060, Dec. 1997. N. Filiol, T. Riley, C. Plett, and M. Copeland, “An agile ISM band frequency synthesizer with built-in GMSK data modulation,” IEEE Journal of Solid-State Circuits, vol. 33, pp. 998-1008, July 1998. S, Willingham, M. Perrott, B. Setterberg, and A. 5GHz frequency synthesizer with settling and 2Mb/s closed loop modulation,” in ISSCC Dig. Tech.

A. Kwasniewski, “Delta-Sigma Modulation in Fractional-N Frequency Synthesis”, Journal of Solid-State Circuits (JSSC), vol 28, no 5, pp 553-559, May 1993. H. Perrott, T. Tewksbury, and C. 5 Mb/s GFSK Modulation”, JSSC, vol 32, no 12, pp 2048-2060, Dec 1997. H. D. G. Sodini, “A Modeling Approach for Sigma-Delta Fractional-N Frequency Synthesizers Allowing Straightforward Noise Analysis”, JSSC, vol 38, no 8, pp 1028-1038, Aug 2002. Thomas H. Lee, “The Design of CMOS Radio-Frequency Integrated Circuits”, Cambridge University Press, 1998.

The prescaler with can be looked upon as a digital-to-phase (D/P) converter. Every reference cycle, the prescaler subtracts rad from its input signal, with determined by the modulator output. As guinea pigs for the analysis, a 3rdorder MASH modulator and the 3rd-order, single-loop, multi-bit modulator of Fig. 4 are chosen, since they represent the far ends of the modulator spectrum. 2. The resulting 56 quantization noise on the division modulus, and thus output phase is approximated by uniformly distributed white noise [6].

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Analog Circuit Design: High-speed Clock and Data Recovery, High-performance Amplifiers, Power Management by Michiel Steyaert, Arthur H.M. van Roermund, Herman Casier


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